June 2013 DocID023804 Rev 1 1/16
AN4187
Application note
Using the CRC peripheral in the STM32 family
Introduction
The cyclic redundancy check (CRC) is a technique used for detecting errors in digital data,
but without making corrections when errors are detected. It is used in data transmission or
data storage integrity check. The CRC is a powerful and easily implemented technique to
obtain data reliability. Diagnostic coverage of this technique satisfies requirements of basic
safety standards. This is why the CRC implementation feature is used at Flash content
integrity self-test check at ST firmware certified for compliance with IEC 60335-1 and IEC
607030-1 standards (known as "Class B" requirements). For more information, refer to
application note AN3307 and the associated firmware packages dedicated for different
family products. It is advised to check all the necessary CRC settings at compilers’ manuals
when CRC checksum information has to be placed directly into user code by linker (mostly
in format of a CRC descriptor data table).
The CRC is based on polynomial arithmetic. It computes the remainder of the division of a
polynomial in GF(2) by another. The remainder is called checksum, while the dividend is the
data and the divisor is the generator polynomial.
Note: A polynomial in GF(2) (Galois field with two elements) is a polynomial with a single variable
x whose coefficients are 0 or 1.
This application note describes the features of the cyclic redundancy check peripheral
embedded in all STM32 series (F0, F1, F2, F3, F4, L1) and the steps required to configure
it.
This application note is structured as follows:
•Section 1 describes the STM32 CRC implementation algorithm and its hardware
implementation benefits.
•Section 2 describes the use of the DMA as CRC data transfer controller.
•Section 3 describes the migration of the CRC through STM32 devices.
Two examples are provided as well:
•CRC_usage example: how to configure the CRC using CPU as data transfer controller.
•CRC_DMA example: how to use the DMA as CRC data transfer controller.
The measuring of execution time in both examples is supported.
Table 1. Applicable products
Type Product category
Microcontrollers STM32
www.st.com
Contents AN4187
2/16 DocID023804 Rev 1
Contents
1 CRC peripheral overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.1 CRC computing algorithm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
1.2 CRC peripheral configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3 CRC hardware implementation benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2 Using CRC through DMA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.1 DMA back-to-back transfer mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2 DMA configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
2.3 DMA usage benefits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3 CRC migration through STM32 series . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4 Reference documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
